This paper presents a modified fractional-order model (FOM) for microorganism stimulation in an up-flow anaerobic sludge blanket (UASB) reactor treating low-strength wastewater. This study aimed to examine the famine period of methanogens due to biomass accumulation in the UASB reactor over long time periods at a constant organic loading rate (OLR). This modified model can investigate the substrate biodegradation in a UASB reactor while considering substrate diffusion into biological granules during the feast and famine periods of methanogens. The Grünwald-Letnikov numerical technique was used to indicate the effect of biomass degradation on the biogas production rate and substrate biodegradation in a UASB reactor installed at Zenein Wastewater Treatment Plant (WWTP) in Giza, Egypt. Several fractional orders were applied in the dynamic model at biomass concentrations of 20 and 4 kg/ m3 in the reactor bed and blanket zones, respectively. An OLR of 0.9 kgCOD/ m3/ day using the calibrated kinetic parameters at 11 ?C was applied to comply with the experimental outcomes. The simulation results indicate that the removal efficiency of chemical oxygen demand (COD) was maintained at approximately 55 – 65 % , whereas the biogas production rate declined from 0.35 to 0.05 m3CH4/ kgCODr in the reactor bed zone due to a decline in food to microorganism (F/M) ratio from 0.04 to 0.018 d- 1 during the sludge retention time (SRT) in the UASB reactor. © 2022, The Author(s), under exclusive licence to Springer-Verlag GmbH Germany, part of Springer Nature.
Review of activated carbon adsorbent material for textile dyes removal: Preparation, and modelling
Water contamination with colours and heavy metals from textile effluents has harmed the ecology and food chain, with mutagenic and carcinogenic effects on human health. As a result, removing these harmful chemicals is critical for the environment and human health. Various standard physicochemical and biological treatment technologies are used; however, there are still some difficulties. Adsorption is described as a highly successful technology for removing contaminants from textile-effluents wastewater compared to other methods. Several adsorbent materials, including nanomaterials, natural materials, and biological biomasses, are identified as effective adsorbents for textile effluents. Activated carbon preparation from these different adsorbents is an excellent pre-treatment to remove the adsorption capacity. Therefore, through this study various adsorbent types, especially activated carbon adsorbents will be discussed in addition to the factors affecting adsorption and models applied for optimising the adsorption process. © 2022
Correction to: Modified fractional-order model for biomass degradation in an up-flow anaerobic sludge blanket reactor at Zenein Wastewater Treatment Plant (Environmental Science and Pollution Research, (2022), 29, 17, (25980-25986), 10.1007/s11356-022-18797-9)
The 6th Nomenclature should be CXin, CSin. The Original article has been corrected. © Springer-Verlag GmbH Germany, part of Springer Nature 2022.
A generalized framework for elliptic curves based PRNG and its utilization in image encryption
In the last decade, Elliptic Curves (ECs) have shown their efficacy as a safe fundamental component in encryption systems, mainly when used in Pseudorandom Number Generator (PRNG) design. This paper proposes a framework for designing EC-based PRNG and maps recent PRNG design techniques into the framework, classifying them as iterative and non-iterative. Furthermore, a PRNG is designed based on the framework and verified using the National Institute of Standards and Technology (NIST) statistical test suite. The PRNG is then utilized in an image encryption system where statistical measures, differential attack measures, the NIST statistical test suite, and system key sensitivity analysis are used to demonstrate the system’s security. The results are good and promising as compared with other related work. © 2022, The Author(s).
CNTFET-Based Ternary Multiply-and-Accumulate Unit
Multiply-Accumulate (MAC) is one of the most commonly used operations in modern computing systems due to its use in matrix multiplication, signal processing, and in new applications such as machine learning and deep neural networks. Ternary number system offers higher information processing within the same number of digits when compared to binary systems. In this paper, a MAC is proposed using a CNTFET-based ternary logic number. Specifically, we build a 5-trit multiplier and 10-trit adder as building blocks of two ternary MAC unit designs. The first is a basic MAC which has two methods to implement, serial and pipeline. The second is an improved MAC design that optimizes the number of transistors, offers higher performance and lower power consumption. The designed MAC unit can operate up to 300MHz. Finally, a comparative study in terms of power, delay, and area variations is conducted under different supply voltages and temperature levels. © 2022 by the authors. Licensee MDPI, Basel, Switzerland.
CNTFET-based ternary address decoder design
With the end of Moore’s law, new paradigms are investigated for more scalable computing systems. One of the promising directions is to examine the data representation toward higher data density per hardware element. Multiple valued logic (MVL) emerged as a promising system due to its advantages over binary data representation. MVL offers higher information processing within the same number of digits when compared with binary systems. Accessing memory is considered one of the most power- and time-consuming instructions within a microprocessor. In the quest for building an entire ternary computer architecture, we propose investigating the potential opportunities of ternary address decoders. This paper presents three different designs for ternary address decoder based on CNTFET. The first design is based on a cascade of Ternary to Binary blocks (T2B) and a binary decoder. The second design is built using the hierarchical structure and enables signals. The third is designed utilising a pre-decoder and ternary logic gates. A comparison of the proposed designs and the binary address decoder in terms of power and delay under different supply voltage and temperature values is introduced. Simulation results show that the second design has the least power and delay of the proposed ternary designs. © 2022 John Wiley & Sons Ltd.
FPGA Implementation of Reconfigurable CORDIC Algorithm and a Memristive Chaotic System with Transcendental Nonlinearities
Coordinate Rotation Digital Computer (CORDIC) is a robust iterative algorithm that computes many transcendental mathematical functions. This paper proposes a reconfigurable CORDIC hardware design and FPGA realization that includes all possible configurations of the CORDIC algorithm. The proposed architecture is introduced in two approaches: multiplier-less and single multiplier approaches, each with its advantages. Compared to recent related works, the proposed implementation overpasses them in the included number of configurations. Additionally, it demonstrates efficient hardware utilization and suitability for potential applications. Furthermore, the proposed design is applied to a memristive chaotic system with different transcendental functions computed using the proposed reconfigurable block. The memristive system design is realized on the Artix-7 FPGA board, yielding throughputs of 0.4483 and 0.3972 Gbit/s for the two approaches of reconfigurable CORDIC. © 2004-2012 IEEE.
Active and passive sensitivity analysis for the second-order active RC filter families using operational amplifier: a review
This work is a review article that sheds light on the active and passive sensitivities of the active RC filters based on opamp. This work provides a detailed analysis through different filters realization criteria and sensitivity summary tables and quantitative insight by discussing the most significant. However, some are almost forgotten, filters families in the literature over decades. A detailed mathematical analysis for the passive sensitivity to compare the filters’ realizations is presented. The concept of dealing between filter design theory and filter design circuit realization is highlighted. Some filters families are chosen from the literature for the analysis. Some detailed specifications tables for each filter family are given. Monte Carlo simulation is carried out on some filters to compare their passive sensitivity. Furthermore, the effect of the active sensitivity of some filters is verified through simulation by adjusting the input common-mode voltage to lower the DC gain of the amplifier. The results of the simulation match with the theoretical analysis and the summary provided in the specifications tables. © 2022, The Author(s).
A Unified FPGA Realization for Fractional-Order Integrator and Differentiator
This paper proposes a generic FPGA realization of an IP core for fractional-order integration and differentiation based on the Grünwald–Letnikov approximation. All fractional-order dependent terms are approximated to simpler relations using curve fitting to enable an efficient hardware realization. Compared to previous works, the proposed design introduces enhancements in the fractional-order range covering both integration and differentiation. An error analysis between software and hardware results is presented for sine, triangle and sawtooth signals. The proposed generic design is realized on XC7A100T FPGA achieving frequency of 9.328 MHz and validated experimentally for a sine input signal on the oscilloscope. The proposed unified generic design is suitable for biomedical signal processing applications. In addition, it can be employed as a laboratory tool for fractional calculus education. © 2022 by the authors. Licensee MDPI, Basel, Switzerland.
CORDIC-Based FPGA Realization of a Spatially Rotating Translational Fractional-Order Multi-Scroll Grid Chaotic System
This paper proposes an algorithm and hardware realization of generalized chaotic systems using fractional calculus and rotation algorithms. Enhanced chaotic properties, flexibility, and controllability are achieved using fractional orders, a multi-scroll grid, a dynamic rotation angle(s) in two- and three-dimensional space, and translational parameters. The rotated system is successfully utilized as a Pseudo-Random Number Generator (PRNG) in an image encryption scheme. It preserves the chaotic dynamics and exhibits continuous chaotic behavior for all values of the rotation angle. The Coordinate Rotation Digital Computer (CORDIC) algorithm is used to implement rotation and the Grünwald–Letnikov (GL) technique is used for solving the fractional-order system. CORDIC enables complete control and dynamic spatial rotation by providing real-time computation of the sine and cosine functions. The proposed hardware architectures are realized on a Field-Programmable Gate Array (FPGA) using the Xilinx ISE 14.7 on Artix 7 XC7A100T kit. The Intellectual-Property (IP)-core-based implementation generates sine and cosine functions with a one-clock-cycle latency and provides a generic framework for rotating any chaotic system given its system of differential equations. The achieved throughputs are (Formula presented.) Mbits/s and (Formula presented.) Mbits/s for two- and three-dimensional rotating chaotic systems, respectively. Because it is amenable to digital realization, the proposed spatially rotating translational fractional-order multi-scroll grid chaotic system can fit various secure communication and motion control applications. © 2022 by the authors.